1. Field of the Invention
This invention relates to a patterning process using a mask such as for example the process used when an insulating film of a micro field emission cathode is formed.
2. Description of the Related Art
When a film-forming material is deposited from above a mask by vacuum deposition, etc, and a film is formed in regions other than the mask, the deposited material on the mask gradually expands and the mask region expands substantially and gradually. Therefore, there occurs the problem that the edge of the pattern formed as a film becomes a slope, and this problem impedes the film formation of an insulating film of a micro field emission cathode, or the like.
FIG. 4 is a sectional view of a micro cold cathode used for a micro vacuum tube, or the like. A conical tip having a pointed tip (emitter tip) 2 is formed on a Si substrate 1, and an electron extraction gate electrode 4 is formed on an insulating layer 3 so formed as to encompass the emitter tip 2. When a voltage is applied between the emitter tip 2 and the gate electrode 4, a high voltage is applied to the cone tip of the emitter tip 2 and field emission occurs. The micro vacuum tube provides greater mobility of the electron than semiconductor devices, can operate at a high speed, and is highly resistant to high temperatures and radiation damage. Owing to these characteristic features of the micro vacuum tube, its application to microwave devices, ultra-high speed computation devices, radiation-resistant devices (in the universe, reactors, etc), high temperature environment devices, display devices, etc, is expected.
FIG. 5 is a sectional view showing a step-wise production process of a micro cold cathode. First of all, the surface of a Si substrate 1 is thermally oxidized in step (1). In the next step (2), the thermal oxide film 5 is patterned into a round shape to form a mask of the oxide film 5m. The Si substrate 1 is then etched in the third step (3). At this time, under-etching is carried out so that side etching is made as shown in the drawing.
The surface of the Si substrate is again oxidized thermally in the fourth step (4), and an emitter tip 2 having a pointed tip is formed inside the oxide film 6. In this state, an insulator such as silicon dioxide (SiO.sub.2), etc, is vacuum deposited in the fifth step (5), and an insulating layer 3 is so formed as to encompass the emitter tip 2. Subsequently, a metal is vacuum deposited and thus a gate electrode 4 is formed on the insulating layer 3.
In the subsequent sixth step (6), only the oxide film 6 is etched by a hydrofluoric acid, or the like, so as to lift off the mask 5m and to form a gate window 7. Finally, the gate electrode 4 is patterned and the cathode is completed.
In this case, no problem occurs if the inner wall 8 of the gate window 7 is formed vertically and with fidelity to the mask 5m as shown in FIGS. 4 and 5 but in practice, the inner wall 8 becomes a slope 8s having a conical shape as shown in FIG. 6, and the window expands gradually into a large diameter D. FIG. 7 is a sectional view showing, in enlargement, the conventional vacuum deposition step (5) in FIG. 5.
At the point of film thickness t.sub.1 at the start of vacuum deposition, the insulating layer 3 is formed with relatively high fidelity to the outer shape of the mask 5m. The vacuum deposition material 10 deposited on the mask 5m has substantially the same size as that of the starting mask 5m at the point of film thickness t.sub.1 but when the film thickness becomes gradually greater to t.sub.1, t.sub.2, t.sub.3 and so forth, the edge of the vacuum deposition material 10 on the mask 5m gradually swells outward from the mask 5m.
In other words, the first particles 10a of the vacuum deposition material are deposited while swelling slightly outward from the outer periphery of the mask 5m and the next particles 10a are likely deposited while swelling slightly outward from the previous particles. In this way, the vacuum deposition material 10 is sequentially deposited while swelling outward bit by bit.
In other words, even when a setting is made in such a manner that the deposition material is incident perpendicularly to the substrate 1, the deposition material 10 deposited on the mask 5m gradually swells outwardly, so that the outer diameter of the mask 5m substantially expands and the shade of the mask 5m increases. Therefore, the opening of the gate window 7 becomes greater with an increase in the film thickness, and the insulating layer 3 becomes conical.
As described above, the inner wall 8s of the gate window 7 is inclined and defines a cone greater than the outer diameter d of the mask 5m. Therefore, the gap between the gate electrode 4 and the tip of the emitter tip 2 becomes greater than 1/2.multidot.D. As a result, when a voltage is applied between the emitter tip 2 and the gate electrode 4, the field concentration at the emitter 2 drops as is also obvious from a drop of the density of the isoelectric line 9, and this creates a problem when the voltage of field emission is reduced.
When the inner wall 8 of the gate window 7 is vertical as shown in FIG. 4, the diameter d of the gate window 7 becomes small, and the gap between the gate electrode 4 and the tip of the emitter tip 2 becomes small, i.e. 1/2.multidot.d. As a result, the density of the isoelectric line 9 becomes high and effective field concentration occurs on the emitter tip 2.
Therefore, when the insulating layer 3 is formed, the inner wall 8 of the gate window 7 must be kept perpendicular with fidelity to the outer shape of the mask 5m. Such a requirement also occurs during patterning using an ordinary mask. This is not a serious problem when the film thickness is small, but as the film thickness increases, the problem owing to an inclination below the edge of the mask becomes more significant.